IT 138 -
3-to-8 line decoder/demultiplexer
Description
The IT138 is a high-speed CMOS device. IT138 decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y’0 to Y’7). It features three enable inputs: two active LOW (E’1 and E’2) and one active HIGH (E3). Every output will be HIGH unless E’1 and E’2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the IT138 to a 1-of-32 (5 lines to 32 lines) decoder with just four IT138 ICs and one inverter. IT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Non-used enable inputs must be tied to appropriate active HIGH- or LOW-state.
Features
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Demultiplexing capability
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Multiple input enable for easy expansion
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Ideal for memory chip select decoding
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Active LOW mutually exclusive outputs
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Complies with JEDEC standard no. 7A
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ESD protection:
HBM EIA/JESD22-A114-C exceeds 2000V
MM EIA/JESD22-A115-A exceeds 200V
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Specified from -40℃ to +85℃ and from -40℃ to +125℃
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Technology
Information:
Data
Sheet
Package: SOP16
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